Super Effects: Insulated Wirebonding Technology X-Wire (Gunter ladewige and Robert Lyn, TRIZCON2007, Apr. 23-25, 2007)

TRIZ Case Study Paper:
Super Effects: The Synergistic Effects of TRIZ (The Theory of Inventive Problem Solving): Significance of the Insulated Wirebonding Technology X-Wire
Gunter Ladewig (PRIMA Performance Ltd., Canada) and Robert Lyn (Microbonds Inc., Canada)
Presented at TRIZCON2007: The 9th Annual Altshuller Institute for TRIZ Studies Conference, Held at Louisville, Kentucky, USA, on Apr. 23-25, 2007
[Japanese translation by Katsunori Ishikawa and Toru Nakagawa, posted in the Japanese page on Sept. 13, 2007]
[Posted on Sept. 13, 2007] Under the permission by the Author.

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Editor's Note (Toru Nakagawa, Sept. 9, 2007)

The paper posted here was originally presented last April at TRIZCON2007 held at Louisville, KY, USA.

This is a very interesting paper of showing the significance of a newly developed technology, i.e. insulated wirebonding technology named X-Wire (TM), from the viewpoint of TRIZ. Since the new techonology allows dense and contact wirebonding between any place of the chips and substrates, it reallizes the stage of '2D plane lines and curves' in the TRIZ Trend of 'Geometrical Evolution of Line' in its full extent. This is the stage that the currently advanced technology (i.e., Area Array Flip Chip) skipped without solving the contradictions in the former technology (i.e., Peripheral Wirebonding), the Authors say. Thus, the Authors expects 'Super Effects', i.e. chain reactions of benefits and innovations, caused by this technology.

I introduced this paper in some detail in my 'Personal Report of TRIZCON2007' , which was posted in this Web site in English on Jul. 3, 2007. The part of reviewing this paper is cited below.

We have just posted the Japanese translation of this paper under the permission by the Authors. The translation was done voluntarily by Mr. Katsunori Ichikawa, an engineer working for a semiconductor/electric industry, Shindengen Electric Manufacturing Co., Ltd. He finished the draft on Aug. 1, and I brushed it up on Sept. 6. It is remarkable that several excellent papers have been posted recently in this Web site both in English and in Japanese translation as the results of this kind of voluntary work by our readers.

This page contains the followings:

(1) Nakagawa's introduction: Excerpt of 'Personal Report of TRIZCON2007'

(2) Paper in HTML (in Japanese translation )

(3) Paper in PDF (452 KB) (in Japanese translation in PDF (580 KB) )

(4) Some additional notes by Nakagawa

We are grateful to the Authors for their kind permission of our Japanese translation and posting, and to Mr. Katsunori Ichikawa for his voluntary work of Japanese translation.

Top of this page

Nakagawa's introduction

Original paper in PDF English (452 KB)

TRIZCON 2007 (Nakagawa Personal Rept.)

Japanese paper PDF

Japanese page

Introduction & Review of the Presentation (Toru Nakagawa (OGU), Jun. 28, 2007)

Excerpt from Nakagawa's 'Personal Report of TRIZCON2007' (posted on Jul. 3, 2007)

Gunter Ladewig (PRIMA Performance Ltd., Canada) and Robert Lyn (Microbonds Inc., Canada) [17] gave an excellent case study paper with the title of "Super Effects: The Synergistic Effects of TRIZ, The Theory of Inventive Problem Solving". This paper reports a new technology, 'Insulated Wire Bonding Technology', called X-Wire (TM) developed by Microbonds guided by the TRIZ methodology. The new technology has removed the serious limitation of the current wire bonding technology, the Authors say.

The current wire bonding technology is illustrated in the following figure. The wires (usually of gold) have the diameter of about 25 microns and are bonded around the peripherals of chips so as not to touch one another. The length of the inter-chip wires must be short to keep the high speed performance of the chips.

Making the number of bonding wires small and the length of them short forces a difficult design choice. A recent technology is Area Array Flip Chip which uses solder balls arranged in matrix under the chip (See the figure below). But this merely transfers the problem to expensive, multi-layer substrates with long layer-to-layer connecting conductors, the Authors say.

The Authors now refer to TRIZ, especially the Trends of Evolution. The problem of chip-to-chip interconnection is related to the 'Trends of Geometric Evolution for a Line'. The Trend may be quoted as:

Point --> Line --> 2D Lines (planar) or curves --> 3D Lines (cubic) or curves --> 3D Complex curves

Looking at the history of wire bonding technologies, the Authors realized that the phase of 2D lines in a planar arrangement was only partially completed. Since the wires should not touch to prevent electrical shorting, the wires are arranged only around the peripherals and leaving the whole center of the chip empty. The current technology has moved without solving contradictions, the Authors say, to the phase of 3D lines, in the form of expensive Flip Chip design. The Authors exploited the opportunity of the skipped '2D lines or curves' phase of evolution.

They have developed a 1 micron-thin, bond wire insulating material that is usable on standard wire bonding assembly equipment. With this insulating coat, the wires can touch one another without shorting, and hence can be bonded densely and at any place including the center of chips. (See the figure.) For developing this technology, they had to overcome numerous obstacles. For example, the coating must be thin, yet have high dielectric strength, must have high flexural strength without cracking, must not inhibit bonding, must be non-contaminating, solvent resistant, adhere to gold, and must be temperature-stable up to 250 degrees.

The Authors expect 'Super Effects', i.e. chain reactions of innovation, which they summarize as follows:

Increased total system performance due to fine pitch, high I/O per chip capability

Relaxed design specifications due to increased process robustness and improved performance

Lower substrate cost due to increased connectivity

Reduced die size resulting in potential billion dollar savings due to increased wafer yields See figure below: [The numbers are not explained. There may be some mistake probably in the middle. -- TN]

X-Wire is a 'plug and play' technology that enables next generation products with the current world-wide wire bonding infra-structure

Quick response engineering changes can be implemented to correct design errors by wiring directly from the bond to the substrate pad without worrying about wire shorting, regardless of location, routing complexity, or length of wire,

It is an enabling technology for system in a chip, SiP [or SoC, TN], and stacked die assembly. Because X-Wires don't short, they can be tightly spaced for high I/O systems in a chip or for stacked die assemblies.

Increased manufacturing quality and product reliability due to immunity from wires shorting during the bonding process or during molding when the chip is encapsulated with plastic.

Savings resulting from all the above benefits.

In conclusion the Authors write:

The above article is a summary of a windfall of benefits that was achieved when a technological system's fundamental constraint or contradiction was solved. We illustrated how just one Trend of Evolution could be used as a competitive weapon. ...

*** This is an excellent paper on developing a novel technology guided by TRIZ. Visit their Web site: http://www.microbonds.com/ .

Original Paper in PDF

Original Paper (in English) (PDF, 452 KB, 8 pages) Click Here.

Some Additional Note (Toru Nakagawa, Sept. 9, 2007)

The following information may be useful to understand this technology:

(1) Web site of Microbonds Inc.: URL: http://www.microbonds.com/
This site contains a nuber of technical references including White Paper, and conference presentations.

(2) US Patentes:

(3) Conference Papers: "Assembly Using X-Wire (TM) Insulated Bonding Wire Technology", by Robert Lyn and William (Bud) Crockett (Microbonds Inc.), SEMICON Singapore 2007.